Analog Computing in Flash Memory
We develop a new AI solution for edge computing

Edge AI Solution

We develop a single AI chip solution for cost-effective edge devices that are not necessarily connected to the cloud for computation all the time.


Our non-volatile neural network solution is implemented in a standard CMOS process. Patent pending analog and Flash memory IPs are integrated in a single chip to provide energy efficient and cost effective AI solution.


A diverse group of talented hardware and software engineers, advisors, and consultants. Executives have a combined 50+ years of experience.

Breakthrough, Engagement, and Testimonial

Why Anaflash is different

We're growing fast!

Recent News

2019 Jan

ANAFLASH Awarded Competitive Grant from the National Science Foundation!

We have received the SBIR Phase I grant award on our proposal titled "Energy Efficient Neural Network Accelerator Featuring a Logic Compatible Non-Volatile Synapse Array." Check out more details from HERE.

2018 Dec

Paper presented in IEDM

Our paper in collaboration with University of Minnesota was presented on Dec 4 in 2018 IEEE International Electron Devices Meeting (IEDM), titled "A 68 Parallel Row Access Neuromorphic Core with 22K Multi-Level Synapses Based on Logic-Compatible Embedded Flash Memory Technology." Published paper is available from HERE.

2018 Nov

Patent Filed.

Patent applications on our novel edge computing idea have been filed in US and other countries.

Contact Information

Address: 3003 N 1st St. Ste# 221
San Jose, California 95134